Dr. L. Merin Singh

Approximate Computing · Digital VLSI · Edge AI · Biomedical ASICs

Loukrakpam Merin Singh, Ph.D.

Assistant Professor, Department of Electronics and Communication Engineering
Manipur Technical University, Imphal, Manipur, India

My research is on energy-efficient digital VLSI design: approximate arithmetic circuits with guaranteed error bounds, hardware architectures for machine-learning algorithms, and low-power electronics for biomedical applications such as EEG-based depth-of-anaesthesia monitoring, mood detection, and EEG artifact removal.

I received my Ph.D. in VLSI Design from NIT Silchar (2020), M.E. in Microelectronics from BITS Pilani (2014) and B.E. in Electronics and Communication Engineering from Manipal Institute of Technology (2011). Before joining Manipur Technical University in 2018, I worked in the semiconductor industry as an ASIC Engineer at NVIDIA and a Design Engineer at Sankalp Semiconductor in Bangalore.

Portrait of Dr. Loukrakpam Merin Singh
15Publications
8Journal articles
59Citations (Google Scholar)
5h-index

Research themes

All research
01

Approximate computing

Error-aware design of approximate multipliers, squarers, square-root and logarithmic circuits that trade a bounded error for large savings in area and energy.

02

Hardware for machine learning

Energy-efficient VLSI architectures for learning algorithms, including a cascade support vector machine with on-chip training and k-means clustering.

03

Biomedical electronics

EEG-based depth-of-anaesthesia monitoring, EEG artifact removal and low-power biomedical ASIC design.

Latest news

News archive

  • PaperEGPARnet, a transformer–GRU model for removing ocular and muscular artifacts from EEG published in Medical & Biological Engineering & Computing (Springer).

  • Paper Work on spectral-edge frequency and spectral energies for depth-of-anaesthesia estimation presented at IEEE ICNGCS 2025.

  • Paper Machine-learning-based depth-of-anaesthesia estimation from EEG features presented at ICCEDT 2023 (Springer).

Selected publications

Full list

  1. Error-aware design procedure to implement hardware-efficient logarithmic circuits

    Merin Loukrakpam, Madhuchhanda Choudhury

    IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 5, pp. 851–855, 2020

    IEEE Xplore

  2. Hardware-efficient VLSI design for cascade support vector machine with on-chip training and classification capability

    Merin Loukrakpam, Madhuchhanda Choudhury

    Circuits, Systems, and Signal Processing, vol. 39, no. 10, pp. 5272–5297, 2020

    DOI

  3. EEGPARnet: time-frequency attention transformer encoder and GRU decoder for removal of ocular and muscular artifacts from EEG signals

    Kiyam Babloo Singh, Aheibam Dinamani Singh, Merin Loukrakpam

    Medical & Biological Engineering & Computing, vol. 64, no. 3, pp. 975–999, 2026

    DOI